Scarica EasyEDA Pro 2.0.30 per Windows

schematic diagram
- Optimize the performance of schematic canvas operations, including zooming, mass selection, panning, copying and pasting, cutting, etc.
- After placing the reused block, the name and symbol name are automatically given and displayed automatically
- The design rule adds component type check items, and the supplier number matches the component attribute
- Bit number allocation supports bit number allocation without question marks, Chinese, etc.
- Optimize package manager's multi-selection and scrolling list performance under a large number of components
- Added design rules: network identification, network port needs to have a name
- Added design rules: When wires and buses are not connected to net identifiers or net ports, the names need to be displayed on the canvas

PCB
- PCB supports placement of menu new graphic elements FPC reinforcement board graphic elements
- Jigsaw dialog adapts to small resolution scenes
- Optimizing the initial wiring logic, removing the logic that triggers the wiring to automatically start from the pad
- Optimize the function of removing loops
- The top and bottom test point property panels add flux extension properties, and the design rules add test point rules
- Added non-active layer color non-attenuation configuration to be consistent with AD view habits
- Optimization of differential pair wiring to ensure that the endpoints of the two lines are always synchronized
- The export coordinate pop-up window supports custom attribute columns, and new support for exporting imposition mark coordinates
- Import changes support to update copper nets at the same time
- Chamfering is also supported for lines whose endpoints are connected but not continuous
- A tab key switching prompt is added to scenes with multiple dynamic input boxes
- Alignment function and attribute position function, aligning with the actual outline of the text
- When the board is flipped, use the magnification before flipping to locate the object before flipping
- Place/paste pads on primitives with networks, add the logic of inheriting networks
- Increase the optimization of multi-selecting multi-segment wires and dragging wire heads
- Add a heat welding attribute to the pad, support setting direct connection or divergence
- The design rule dialog box supports Jiali Chuang multiple process configuration switching
- The function of selecting the connected copper skin is added to the edit menu
- The color of unrouted nets is also highlighted during routing
- The arc type support in the arc property panel is recorded in the file
- Combination optimization, no longer allow primitives in the combination to drag control points or stretch
- In the export BOM dialog box, when the range selection is PCB, add a "layer" in the statistics

panel
- Panel production files, the printing layer and cover layer corresponding to the opening position will not be hollowed out
- The filter configuration is not checked by default.
- Added smart size function in the placement menu of the panel
- Added auxiliary line function in the placement menu of the panel
- Placing pictures supports restoring the original ratio
- Support for drum cladding
- Support panel common library, panel library creation and placement. After placement, it will be automatically broken up into multiple common primitives
- Support dragging the bbox border to adjust the size

other
- Adjust the collection on the left panel, engineering-related mergers into the "Engineering Design" tab, and library-related mergers into the "Library Design" tab
- Start page support is always displayed
- The function of saving as a reused block is added to the reused block project
- Add editor version number and client mode in top right corner
- Fix some issues with format conversion